FIELD: digital circuitry.
SUBSTANCE: invention relates to digital circuitry, automation and industrial electronics. It includes five additional transistors and four additional resistors, in-series connected to each other third additional transistor (n-p-n), second additional resistor and fourth additional transistor (n-p-n), fifth additional transistor (n-p-n) and a third additional resistor are also connected in series, the base of the fifth additional transistor is connected to the collector of the first additional transistor, and its header - with common output of third resistor and emitter of second transistor, free output of third additional resistor is connected to common output of second additional resistor and collector of fourth additional transistor, fourth additional resistor is connected between "ground" and common output of the second and fourth resistors, common output of the second, fourth and fourth additional resistors forms relative to "ground" output (Q) of synchronous trigger.
EFFECT: simplification of trigger synchronous D flip-flop.
1 cl, 1 dwg
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Authors
Dates
2019-06-24—Published
2018-10-16—Filed