FIELD: physics.
SUBSTANCE: invention relates to pulse and computer equipment and can be used in construction of self-synchronized register and computing devices, digital information processing systems. Device is based on C-elements due to embedding into C-element of additional p-MOS or n-MOS transistor, controlled by inverting output of other C-element of same register bit, and using the equivalence or non-equivalence element as the storage register discharge indicator, wherein in sampling circuit of self-synchronized storage register containing indicator element 2OR-NOT or 2AND-NOT, paraphrase data input, control input, a paraphrase information output and an indicator output, three-input C-elements having two outputs are used, the third input of one C-element is connected to the second output of the other C-element and vice versa.
EFFECT: technical result is increase in fault tolerance of self-synchronized storage register with zero or single spacer.
5 cl, 5 dwg
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