FIELD: pulsed and computing engineering.
SUBSTANCE: used in the construction of self-timed combinational and computing devices, primarily multipliers, as well as digital information processing systems that are resistant to logical failures. The self-timed single-bit quaternary adder additionally contains a second paraphase disparity element, a third AND-NOT element, two OR elements, five binary equivalence elements with binary inputs and outputs, a third OR-AND-NOT element and a generator block for the zero component of the sum output and indicator output.
EFFECT: ensuring self-timed operation of a single-bit adder with terms with a single spacer, increasing its performance and resistance to logical failures.
4 cl, 4 tbl, 6 dwg
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