FIELD: computer technology.
SUBSTANCE: invention relates to the field of computer technology. The device contains an external data input ID, a group of external inputs of the template IS, containing K bits, a group of external inputs IK for setting the bit depth of the input template IS, containing m bits, a group of external data outputs QB, a group of external outputs of the number of templates QS, and also contains an RS flip-flop start-stop TSS 1, the first bit counter STB 2, the output buffer OB 3, the second subtractive counter of bits of the STK template 4, the AND element 5, the input data shift register RD 6, the DC decoder 7, a group of (K-1) elements OR 81 , 82, 8(K-1), the first group of K-elements AND, the second group of K-elements AND, comparator COMP 11 and the third counter of the number of patterns CTS 12, as well as external inputs of the clock signal IC, device start START, device stop STOP and internal BDC bit decoding bus.
EFFECT: detecting IK bit groups in the input N-bit binary number corresponding to the IK bit given group pattern IS, which contains a given sequence of 1's and 0's.
1 cl, 3 dwg
