METHOD FOR RELIEVING INTERNAL STRESSES IN THIN FILMS OF THE TOPOLOGY OF MICROWAVE MICROSTRIP BOARDS USING VACUUM ANNEALING Russian patent published in 2023 - IPC H05K3/22 H05K3/24 

FIELD: electronic engineering; microelectronics.

SUBSTANCE: invention concerns the removal of internal stresses of thin films deposited on a dielectric base. Invention is aimed at the removal of internal stresses of metal films of the topological layer of microstrip circuit boards by vacuum annealing and, as a result, improvement of the interlayer adhesion parameter of the product by eliminating hidden defects of microstrip circuit boards during their manufacture, preventing their release and subsequent installation, thereby significantly reducing the risk of failure hardware items. It is achieved by the fact that the method includes cleaning the surface of the boards by wiping with alcohol or acetone to degrease the surface. Products are placed in a chamber of a vacuum furnace so that the conductive layer of the boards is not blocked, vacuum annealing of products is carried out in a vacuum of at least 10^-5 mmHg, at a process temperature of 290°C for boards without barrier nickel - for 4 hours, and at a process temperature of 400°C for boards with barrier nickel - for 2.5 hours. At the end of the thermal training, the adhesion of the elements of the topological pattern of the board is monitored by tearing off an adhesive tape with an adhesive layer in two mutually perpendicular directions, the surface of the boards is cleaned from adhesive residues by wiping and degreasing the surface with alcohol or acetone, and the appearance of the boards is monitored using a microscope for delamination of the conductor layer.

EFFECT: removal of internal stresses of metal films of the topological layer of microstrip circuit boards by vacuum annealing and, as a result, improvement of the interlayer adhesion parameter of the product by eliminating hidden defects of microstrip circuit boards during their manufacture, preventing their release and subsequent installation, thereby significantly reducing the risk of failure hardware items.

4 cl, 1 dwg, 1 tbl