FIELD: physics.
SUBSTANCE: use for DM in a given test mode to prevent data processing errors by a circuit. Essence of the invention consists in the fact that the semiconductor memory device is in a given test mode, a first Model Register (MR) and a second MR associated with the Data Pin (DQ) are configured to directly determine the impedance of the Data Mask Pin (DM). For DM, there is no need to add determination of the state of the output signal generator and the corresponding control circuit for a given test mode in order to ensure adaptation of the given test mode to the DM.
EFFECT: enabling prevention of data processing errors by the circuit.
22 cl, 12 dwg, 3 tbl
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|---|---|---|---|
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| APPARATUS FOR CONTROLLING AND RESTORING TECHNICAL MEANS INTENDED FOR MEDICAL USES | 1992 |
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| SEMICONDUCTOR DEVICE AND DISPLAY DEVICE | 2008 |
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| ELECTRONIC MEMORY DEVICE | 1998 |
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| DEVICE FOR SIMULATION OF FAULTS AND IN-CIRCUIT TESTING OF DIGITAL EQUIPMENT ELEMENTS | 1995 |
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RU2093885C1 |
