MULTICORE PROCESSOR WITH HIERARCHICAL CACHE MEMORY CAPABLE OF STORING DATA IN COMPRESSED FORM Russian patent published in 2025 - IPC G06F12/811 

FIELD: computer engineering.

SUBSTANCE: multi-core processor equipped with a cache memory, which includes a common partition and individual partitions by the number of cores, wherein each of the common partition and individual partitions comprises indicated cells and indicating cells, wherein said cells of the common partition are capable of storing data in an uncompressed or compressed form, and said cells of the individual partitions are capable of storing data in an uncompressed form, wherein each indicating cell of common section, not having its specified cell, together with data identifier is able to store address indicator, wherein cache memory is capable of transferring data from a source indicated cell of an individual partition to a portion of a target indicated cell of a common partition and is capable of storing transferred data in a portion of a target indicated cell of the common partition in a compressed form, and indicating cell of common section is capable of storing together with it an address pointer indicating data storage in a common section.

EFFECT: reduction of time required for transfer of data stored in individual sections of cache memory belonging to other cores to multi-core processor cores.

3 cl, 3 dwg