FIELD: microelectronics; LSIC and VISIC manufacturing process. SUBSTANCE: in forming semiconductor structures with stepped shape of polycrystalline silicon islands, photoresists mask is etched selectively with respect to polycrystalline silicon layer and mask configuration is varied by forming step relative to edge of polycrystalline silicon island; step width, depth of blind (surface) anisotropic etching of polycrystalline silicon, thickness of component interconnection layer, and thickness of polycrystalline silicon layer are interrelated by expression hpcs-hint+hmin.int<X<hmin.int-hcomp.int, where hpcs is thickness of polycrystalline silicon layer; x is width of photoresist mask step relative to edge of polycrystalline silicon island or depth of blind anisotropic etching of polycrystalline silicon layer; hint is thickness of component interconnection layer; hmin.int is minimal permissible thickness of continuous layer of component interconnection. EFFECT: improved reproducibility of linear dimensions of polycrystalline silicon islands and reduced break probability in component interconnection layer. 5 dwg
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Authors
Dates
1996-09-10—Published
1990-09-26—Filed