FIELD: semiconductor engineering. SUBSTANCE: method involves supplying control pulse of same polarity as operating voltage to semiconductor structure before its change-over moment; rate of rise of control pulse meets expression dU/dt > 2E∂W/τs, where Eo is characteristic field of semiconductor silicon structure equal to 105 V/cm; W is thickness of high-resistance layer of semiconductor structure characterized by level of doping with acceptor or donor impurities Na or Nd, respectively, , each not in excess of 1015 cm-3. Layer thickness W is not over 0.2 cm; τs is transit time of mobile charge carriers through high- resistance layer of W thickness equal to τs= W/Vs, where Vs is saturated carrier drift velocity in semiconductor structure. In optional version, control pulse of polarity reverse to that of operating voltage is applied to semiconductor structure before its change-over moment; rate of rise of control pulse meets here expression dU/dt > 4E∂W/τs, where Eo is characteristic field of semiconductor silicon structure equal to 105 V/cm; W is thickness of high-resistance layer of semiconductor structure characterized by level of doping with acceptor or donor impurities, respectively, each not in excess of 1015 cm-3. Layer thickness W is not over 0.2 cm; τs is transit time of mobile charge carriers through high-resistance layer of W thickness equal to τs= W/Vs,, where Vs is carrier saturated drift velocity in semiconductor structure. EFFECT: improved speed and efficiency of switching semiconductor structures due to reduced switching and residual loss; increased currents and voltages handled. 2 cl, 7 dwg
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Authors
Dates
1998-06-20—Published
1997-04-10—Filed