FLUX-FREE ASSEMBLY OF CHIP-SIZED SEMICONDUCTOR PARTS Russian patent published in 2005 - IPC

Abstract RU 2262153 C2

FIELD: electric wiring and sealing of semiconductor parts.

SUBSTANCE: proposed method for assembling semiconductor parts includes formation of tab connector pairs on respective surfaces of chip and substrate including their interconnection. Each tab connector in each pair has top part incorporating at least one component of electricity conducting eutectic alloy. Pointed vertical peaks are formed on at least one of tab connectors in each pair. Chip and substrate are pressed to one another by force and tab connectors are heated until pointed peaks penetrate through oxide films provided on respective opposing tab connectors in each pair and come in contact with top surface of other tab connector thereby initiating their fusion. Then tab connectors are cooled down to afford hardening of fused parts and to form conducting joints between each respective pair, as well as to seal package over periphery. In this way semiconductor chip is soldered to substrate by means of alloys having relatively low fusing temperature.

EFFECT: enhanced post-hardening strength and environmental friendliness of joint.

16 cl, 10 dwg

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RU 2 262 153 C2

Authors

Garjainov S.A.

Gotman Aleksandr Sergeevich

Novikov V.V.

Dates

2005-10-10Published

2002-03-01Filed