INTEGRATED LOGIC NOT GATE DEPENDING FOR ITS OPERATION ON TUNNEL EFFECT Russian patent published in 2006 - IPC H03K19/20 H01L29/812 

FIELD: computer engineering and integrated electronics.

SUBSTANCE: proposed integrated logic NOT gate depending for its operation on tunnel effect with paraphase outputs makes use of charge carrier tunneling effect between regions of first main and first additional channels separated by AlGaAs region of first tunnel barrier and between regions of second main and second additional channels separated by AlGaAs region of second tunnel barrier; use is also made of two input buses and additional power and zero potential regions, spacers, and additional AlGaAs regions of first and second polarities of conductivity. This provides for changing state of proposed integrated logic NOT gate from logic zero to logic one and vice versa under impact of input control voltages within time interval dependent on sluggishness of charge carrier drift and tunneling processes through AlGaAs regions of first and second tunnel barriers and independent of charge carrier transit time in channel GaAs regions as total number of charge carriers in channel separated by tunnel barrier regions in the course of change-over of integrated logic NOT gate does not actually change.

EFFECT: enhanced speed.

1 cl, 4 dwg