DIGITAL PHASE-LOCKED LOOP SYSTEM (VERSIONS) Russian patent published in 2010 - IPC H03L7/06 

Abstract RU 2383991 C2

FIELD: physics; communication.

SUBSTANCE: invention relates to communication engineering and can be used in devices based on phase-locked loop systems (PLL). The digital PLL system has a limiting amplifier, two quadrature channels, a discriminator in form of a functional generator, a control law generator and a recovered carrier frequency synthesiser with quadrature outputs at the output of each of which the corresponding current signal value Ai and Bi is formed. The discriminator in form of a functional generator plots a discriminator curve of the form or

EFFECT: faster synchronisation of the PLL system during reception of short messages, increased reliability.

2 cl, 5 dwg

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RU 2 383 991 C2

Authors

Antsibor Nikolaj Mikhajlovich

Talanov Aleksej Aleksandrovich

Dates

2010-03-10Published

2008-03-31Filed