FIELD: information technologies.
SUBSTANCE: in one of aspects the invention includes a system, which comprises the following: (a) multiple parallel processors in a single microchip; and (b) a computer memory installed in this microchip and available for each processor; besides, each processor is designed to handle minimum set of commands, which consists of seven commands, and moreover each of processors comprises local cache memories designed for each of at least three identified registers in a processor. In the other aspect the invention includes a system, which comprises the following: (a) multiple parallel processors in a single microchip; and (b) a computer memory installed in this microchip and available for each processor, besides, each processor is designed to handle a set of commands optimised for parallel processing at the level of flows.
EFFECT: acceleration of programme operation with application of a microprocessor optimised for flows.
20 cl, 14 dwg
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Authors
Dates
2011-08-27—Published
2007-02-05—Filed