ANALOGUE-TO-DIGITAL CONVERTER AND ZERO OFFSET CALIBRATION METHOD Russian patent published in 2014 - IPC H03M1/10 

FIELD: radio engineering, communication.

SUBSTANCE: high-speed N-bit combined analogue-to-digital converter (ADC) includes an input parallel M-bit ADC1, an M-bit digital-to-analogue converter (DAC1), a sampling and storage device (SSD) and a pipelined (N-M+1)-bit ADC2. The M-bit ADC1 and DAC1 employ a common serial resistance divider. The SSD with double sampling, consisting of an amplifier and two samplers, generates a different signal of the input voltage of the ADC and the output voltage of the DAC. The entire analogue circuit of the ADC is differential. The ADC implements individual zero offset calibration for different samplers, for which are used two identical calibration DACs and a switch which transmits to the amplifier of the SSD a calibration signal corresponding to the sampler in storage mode, from one of the calibration DACs. During calibration, a zero differential signal with an in-phase level equal to or close to the in-phase level of the input signal is transmitted to the input of the SSD.

EFFECT: reduced conversion error of an ADC by eliminating separation of zero offset on samplers by performing zero offset calibration separately for each sampler.

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