FIELD: information technology.
SUBSTANCE: codec (30) includes at least one coder (10) and at least one decoder (20). Encoder includes data processing circuit for application to input data (D1) of one of forms of differential and/or summing coding to form one or more corresponding coded sequences, which is subjected to cyclic shift relative to maximum value and/or cyclic shift relative to minimum value to generate encoded output data (D2 or D3). Decoder includes data processing circuit for processing one or more parts of encoded data (D2 or D3) configured to use one of difference and/or summing decoding types to one or more corresponding coded sequences specified one or more parts, wherein one or more encoded sequences are subjected to cyclic transition operation relative to maximum value and/or cyclic transition relative to minimum value for formation of decoded output data (D5).
EFFECT: high degree of data compression.
44 cl, 3 dwg, 2 tbl
Authors
Dates
2016-08-27—Published
2014-02-27—Filed