FIELD: physics.
SUBSTANCE: one n/2-bit two-input multiplexer, one single-bit two-input multiplexer, one n/2-bit adder is eliminated, and one (n/2+1) -bit half-adder is introduced. The essence of the invention consists in implementing the following method of summing the n-bit numbers A and B. Having an n-bit adder, it is divided into 2 equal n/2-bit groups. On one n/2-bit adder, the lowest fields of the operands Al and Bl are summed, on the second n/2-bit adder, the highest fields of the operands Ah and Bh are summed, provided that the transfer to Cin2 on the second n/2-bit adder is equal to "0".
EFFECT: reduction of equipment, reduction of energy consumption.
1 dwg
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