SEMICONDUCTOR MEMORY Russian patent published in 2018 - IPC G11C11/16 

FIELD: electricity.

SUBSTANCE: semiconductor memory comprises memory blocks, each of which includes an array of memory cells; word lines connected to the lines in each of the memory blocks; the first address latch scheme, which is intended for the full row address defining one of the word lines, the full row address including the first row address and the second row address; and the second address latch circuit that is designed for the full column address defining one of the columns of the memory block, wherein the first address latch circuit receives the first command and the second command and includes the first latch circuit that is destined for the first address of the row, and a second latch circuit for the second row address; the first latch circuit locks the first row address in response to the first command, the second latch circuit locks the second row address in response to the second command, wherein the first latch circuit and the second latch circuit are separate from each other and the second address latch circuit receives the second command and fixes the column address in response to the second command.

EFFECT: ensuring that the storage device is included in the system without increasing the number of outputs or reducing the speed of operation.

13 cl, 13 dwg