FIELD: computer equipment.
SUBSTANCE: invention relates to pulse and computer technology and can be used in the construction of self-timed combinational and computing devices, digital information processing systems, primarily as elements of the first stage of the Wallace multipliers tree. Device contains four AND-OR-NOT elements, five NOR elements, an element of parity input and output parity, two NAND elements, two OR-AND-NOT elements, two hysteresis flip-flops, two AND elements, an AND-OR element, an inverter.
EFFECT: technical result is simplification of implementation and increase in speed.
1 cl, 2 tbl, 1 dwg
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