FIELD: manufacturing technology.
SUBSTANCE: invention relates to a method of making a semiconductor structure protruding from a monolithic silicon body to form active and passive elements of integrated circuits. Substance of invention consists in method of fabrication of mask for etching of vertical semiconductor structure by application of first layer of material (semiconductor, metal, dielectric, silicides, etc.) on surface of substrate. Then, by means of photolithography windows are formed in the form of a square or a rectangle, after which this layer is etched, then the second layer of material (semiconductor, metal, dielectric, silicides, etc.) is applied on this layer, after which a third layer of material is applied on the surface, which is a mask relative to the first two layers (semiconductor, metal, dielectric, silicides, etc.), and by means of chemical-mechanical polishing, removing the third layer of material, then, using remaining part of third layer as mask, first and second layers of material are removed, then third layer of material is removed. Structure of the second layer of any shape, for example in the form of a rectangle with size less than that enables photolithography, is used as a mask for producing a vertical semiconductor structure.
EFFECT: invention reduces size and simplifies technology of making a vertical semiconductor structure.
1 cl, 8 dwg, 2 tbl
Title | Year | Author | Number |
---|---|---|---|
METHOD FOR MANUFACTURING CONTACT WINDOWS WITH A REDUCED SIZE FOR SEMICONDUCTOR DEVICES | 2021 |
|
RU2767484C1 |
METHOD FOR PRODUCTION OF TUNNELLING MULTI-GATE FIELD NANOTRANSISTOR WITH SCHOTTKY CONTACTS | 2018 |
|
RU2717157C2 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE WITH GATE ELECTRODE OF NANOMETRIC LENGTH | 2003 |
|
RU2237947C1 |
METHOD OF MAKING FIELD-EFFECT NANOTRANSISTOR WITH SCHOTTKY CONTACTS WITH SHORT NANOMETRE-LENGTH CONTROL ELECTRODE | 2012 |
|
RU2504861C1 |
PROCESS OF MANUFACTURE OF INTEGRATED-CIRCUIT TRANSISTOR | 1985 |
|
SU1371445A1 |
CMOS/SOI MRAM MEMORY INTEGRATED WITH VLSI AND METHOD FOR PRODUCTION THEREOF (VERSIONS) | 2012 |
|
RU2532589C2 |
METHOD OF MAKING COMPACT TRENCH CAPACITOR | 2024 |
|
RU2825218C1 |
PROCESS OF SELECTIVE ETCHING OF SILICON-CONTAINING LAYER IN MULTILAYER STRUCTURES | 0 |
|
SU1819356A3 |
METHOD OF MANUFACTURING MUTUALLY ADDING METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICES | 0 |
|
SU1023969A1 |
METHOD OF MANUFACTURING INTERCONNECTIONS FOR SEMICONDUCTOR DEVICES | 2015 |
|
RU2593415C1 |
Authors
Dates
2019-08-28—Published
2018-11-28—Filed