FIELD: semiconductor electronics.
SUBSTANCE: invention relates to the field of semiconductor electronics technology and can be used as a method of forming (manufacturing) vertical-type capacitors (trench capacitors) both built into integrated circuits (IC) crystals and in the form of discrete passive elements. Method of making a compact trench capacitor includes forming an oxide layer region on the surface of a silicon substrate, forming a contact region on the surface of the silicon substrate to the first plate of the capacitor, formation of a plurality of deep trenches in the oxide layer and in the silicon substrate, doping of the inner surface of the deep groove trenches, which performs the role of the first trench capacitor plate, the formation of a dielectric layer from non-stoichiometric silicon nitride on the inner surface of the deep trenches and on the part of the substrate surface adjacent to the deep groove, formation of a first layer of polysilicon, doped by diffusion of phosphorus from a liquid source using phosphorus oxychloride to form a second plate of a trench capacitor, formation of a layer of silicon oxide on the first layer of polysilicon by its partial oxidation and deposition of the second layer of polysilicon for filling of multiple trenches.
EFFECT: reduced mechanical stress in the silicon wafer, increased breakdown voltage of 3D trench capacitors, without complicating the technology of its formation, possibility of forming a contact to the first plate of the capacitor both from the upper and lower sides of the substrate.
1 cl, 11 dwg
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Authors
Dates
2024-08-22—Published
2024-02-26—Filed