FIELD: computer equipment.
SUBSTANCE: device has an external data input DI, a group of external data outputs QO, a group of external outputs of the number of QG groups, a group of external outputs of the number of zeros QZ, group of external outputs of number of units QU, group of external outputs "Difference of units and zeros" QZU, groups of external outputs of number of units in maximum group MU, number of zeros in maximum group MZ, number of group of maximum group of units NGMU, number of group of maximum group of zeros NGMZ, start number of maximum group of single bits of NMU and number of beginning of maximum group of zero bits of NMZ, first RS trigger of start-stop TSS 1, unit of detector of units and zeros 2, third D-trigger of group counting allowance TCE 7, a third AND gate 8, a first adder SMG 9, a second bit counter CB 10, an output buffer OB 11, fourth 12, fifth 13 and sixth 14 AND elements, third zeroes counter CZ 15, fourth unit counter CU 16, a fifth zero-number reversal counter CZU 17 and a difference code converter unit 18, a first counter CNB 22, a first RNM register 23, a second adder SNM 24, second 25, third 26, fourth 27, fifth 28, sixth 29, seventh 32 and eighth 35 registers, first comparator of number of single bits comparator 30, seventh element AND 31, second comparator of number of zero bits comparator 33, eighth element AND with one inverse input 34, as well as external flags of readiness of FE result, "Buffer is filled" FF, "Buffer is empty" FZ and flag "Zeroes greater than ones" F01.
EFFECT: technical result consists in enabling detection of maximum groups of single and zero bits and determining the number of bits in maximum groups, group numbers and beginning of groups in a binary sequence.
1 cl, 4 dwg
Authors
Dates
2020-08-03—Published
2020-01-15—Filed