FIELD: technological processes.
SUBSTANCE: invention relates to circuit board. Said technical result is achieved by preparing a substrate with a seed layer comprising a sublayer on the surface of the dielectric substrate and a seed layer on the sublayer surface, wherein the seed layer has a predetermined interconnection pattern and comprises a metal, solid electrolyte membrane pressing to iner layer and underlayer, application of voltage between anode and sublayer for reduction of metal ions in membrane and formation of metallisation layer on surface of seed layer, and removal of open section without seed layer and layer of metallization of sublayer.
EFFECT: technical result is increased adhesion between metallisation layer and seed layer.
11 cl, 13 dwg
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