FIELD: physics.
SUBSTANCE: invention relates to microprocessors equipped with cache memory for data storage. Technical result is achieved by performing the steps of the method, at which: determining the first and second groups of target values, which have sequences of most significant bits with the same bit values, placing the first and second sequences of most significant bits, respectively, in the first and second common unit storage structures, while the sequence of the least significant bits of each target value of the first and second groups is placed in a unit storage structure, which is individual for a given target value, creating an array mask, preserving a characteristic value, which determines the belonging of the target value to the first or second group, in the process of retrieving an array from cache memory, each target value is obtained by concatenating a first or second sequence of most significant bits and a sequence of least significant bits.
EFFECT: simple design of the processor, the cache memory of which is capable of storing data in a compressed form.
8 cl, 5 dwg
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