FIELD: manufacture of power transistors, thyristors, and other semiconductor devices with high-voltage p-n junctions. SUBSTANCE: active components are shaped on plates, the latter are divided into chips, defective structures are rejected, chips are fixed on temporary substrate. Then chip thickness is reduced to that not less than width of spatial charge area of high-voltage p-n junction and common resistive contact is shaped for all chips; interconnections are also shaped. EFFECT: facilitated procedure. 3 dwg
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