FIELD: electricity.
SUBSTANCE: in the manufacturing method of high-power SHF LDMOS transistors polysilicon applied to gate dielectric is coated with high-melting metal, by high-temperature annealing polycide of high-melting metal is formed at polysilicon surface, by photolithography from polycide of high-melting metal and polysilicon layer below it polycide gate teeth of elementary cells are formed with contact pads joining them from the source side and used as a blocking mask at introduction of boron, phosphorus and arsenic ions to the substrate while forming p-wells, multistage lightly doped n-areas of the drain and highly doped n+-areas of the drain and source of elementary cells, and accurate shunting of polycide gate cell teeth by metal bars is made through polycide branched contact pads joining gate teeth, at that in high-ohmic epitaxial p-layer of the substrate under branched contact pads of polysilicon gate teeth auxiliary local highly doped n+-areas are shaped with a higher doping degree in comparison with p-wells of elementary cells.
EFFECT: invention provides development of modern basic nanotechnology for manufacturing of high-power SHF LDMOS transistors at more accessible and less expensive process equipment.
7 dwg
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Authors
Dates
2014-12-10—Published
2013-06-26—Filed