METHOD OF MANUFACTURING OF POWERFUL SILICON SHF LDMOS TRANSISTORS WITH MODERNIZED GATE NODE OF ELEMENTARY CELLS Russian patent published in 2017 - IPC H01L21/336 

FIELD: electricity.

SUBSTANCE: in the known method of manufacturing of powerful silicon SHF LDMOS transistors with a modernized gate node of elementary cells, including the creation of through source p⁺-bridges of elementary transistor cells in a high-resistance epitaxial p^--layer of the initial silicon p^-p⁺-substrate, growing of the gate dielectric on the front surface of the substrate, application of a layer of polysilicon on the gate dielectric and its phosphorus doping, application of a refractory metal to the polysilicon, the formation of a refractory metal polycide, the creation of the refractory metal from the polycide and the polysilicon layer located under it by the photolithography method of policide electrode of the gates of elementary cells in the form of narrow long longitudinal teeth of rectangular cross section, the creation in a high-resistance p^--layer of the substrate of p-pockets, multistage lightly-doped n^--drainage areas and high-alloyed n⁺-drainage areas and source of elementary cells by means of introduction, respectively, boron, phosphorus and arsenic ions into the substrate, when polycide electrode of the gate and photoresist layers are used as a protective mask and subsequent diffusion redistribution of impurities embedded in the substrate, a stepwise sedimentation of a multilevel intermediate dielectric onto the front surface of the substrate and a stepwise opening of contact windows over the high-alloyed p⁺-bridges, high-alloyed n⁺-drainage areas and source and pointwise over the polycide electrodes of the gate of elementary cells, the formation of multilevel metal drain electrodes and shunt buses of the gate, as well as the shielding electrodes of the elementary cells grounded at the source on the front surface of the substrate and the common metal electrode of the source of the transistor structure on its rear side, first create narrow polycidal longitudinal teeth of the gate node of the elementary cells and use them as a protective mask when introducing boron, phosphorus and arsenic ions into the substrate when forming respectively p-pockets, multistage lightly-doped n^--drainage areas and high-alloyed n⁺-drainage areas and source of elementary cells, and metal conductors pointwise shunting the longitudinal polycarial gate teeth of the elementary cells form simultaneously with the 1st level of the shunt buses of the gate of the transistor structure over the through source p⁺-bridges in the high-resistance epitaxial p^--layer of the substrate and from the same material.

EFFECT: more affordable and less expensive processing equipment for manufacturing.

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