METHOD OF MANUFACTURING SELF-COMBINED BICMOS STRUCTURE OF SUBMICROMETER SIZES Russian patent published in 2008 - IPC H01L21/8248 

Abstract RU 2329567 C1

FIELD: electrical engineering.

SUBSTANCE: invention may be used in manufacture of BiCMOS structures for multiple element photodetectors and radio circuits that apply basic technology of CMOS devices. Substance of invention: high efficiency of emitter and current amplification factor with submicrometer values of emitter size is achieved due to formation of polysilicon ring electrode around emitter area in silicon. Ring electrode is installed at sub-gate oxide, embraces emitter and has its potential, which creates field around emitter that prevents recombination of non-operating carriers in near-surface area, and as a result, increases amplification factor values two-three times. Reduction of manufacturing route is achieved due to combination of all main processes of bipolar transistor creation with standard processes of CMOS manufacturing, without loss of quality and deterioration of bipolar transistor parameters.

EFFECT: increase of bipolar transistor structure quality, preservation of emitter high efficiency and current amplification factor with reduction of emitter width down to submicrometer sizes, and also in "reduction" of manufacturing route, which stipulates reduction of quantity of lithography operations and semi-conducting layers, which reduces cost, increases percentage of proper items output and process manufacturability.

3 cl, 4 dwg

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RU 2 329 567 C1

Authors

Adamov Jurij Fedorovich

Gorshkova Natal'Ja Mikhajlovna

Krupkina Tat'Jana Jur'Evna

Dates

2008-07-20Published

2006-11-16Filed