FIELD: electronics. SUBSTANCE: invention refers to BICMOS devices in which complementary bipolar and field- effect transistors are formed on one crystal and to technology of manufacture of vertical n-p-n and p-n-p field-effect transistors and complementary field- effect transistors. Design of BICMOS device makes it possible to diminish substantially dimensions of transistors due to usage of self-registered technology of formation of bipolar and field-effect transistors. In proposed device first vertical bipolar transistor includes emitter electrode from second layer of polysilicon above emitter region, base electrodes to two regions of passive base and collector electrode from third layer of polysilicon, self-registered metal silicide layers to base, emitter and collector electrodes, metal electrodes manufactured to base, emitter and collector electrodes. Second bipolar transistor has same structure as first vertical bipolar transistor with type of conductance opposite to that of first vertical bipolar transistor. First MOS transistor has source and drain regions separated by channel region, gate of first and second layers of polysilicon and metal silicide layer deposited on dielectric under gate, electrodes from third layer of polysilicon to regions of drain and source brought out on to field oxide and coated with metal silicide layer, metal electrodes contacting regions of source and drain through electrodes from third layer of polysilicon brought out on to field oxide. Second MOS transistor has same structure as first MOS transistor and type of conductance opposite to that of first MOS transistor. EFFECT: substantially diminished dimensions of transistors. 2 cl, 12 dwg
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Authors
Dates
1998-03-10—Published
1996-04-30—Filed