COMPLEMENTARY BIPOLAR NAND CIRCUIT (OPTIONS) Russian patent published in 1997 - IPC

FIELD: microelectronics; manufacture of combined logic superlarge-scale CMOS integrated circuits of superlow power requirement. SUBSTANCE: complementary bipolar NAND gate which is functional integrated circuit compatible with CMOS technology has newly introduced first and second p-n-p loading transistors whose bases are combined and connected to circuit output with the result that p-n-p loading transistors function at cut-off barrier and do not consume current from power supply when at least one of circuit inputs is placed at logical 0 voltage. Proposed circuit uses functional integration of semiconductor regions of all circuit transistors and standard CMOS technology for its manufacture. Low-resistance n+ substrate is introduced to reduce current gain of parasitic p-n-p transistor and parasitic resistance Rx of n substrate. Circuit is set up on insulating substrate which eliminates P+ regions around it causing parasitic current leakage and stray capacitances as well as volumetric and surface regions wherein charge carrier generation caused by radiation may develop. EFFECT: reduced power requirement, facilitated manufacture and reduced cost, reduced parasitic effect of "latching", improved speed and radiation resistance. 3 cl, 4 dwg