MEMORY CELL BASED ON THIN-LAYER NANOSTRUCTURE Russian patent published in 2012 - IPC H01L29/76 B82B1/00 

FIELD: electricity.

SUBSTANCE: substrate is made as nanosized and is a common anode of loading diodes, on the substrate there is the first area of the second type of conductivity, which is a collector of the first switching transistor and a cathode of the first loading diode, arranged as nanosized, the second area of the second type of conductivity, which is a collector of the second switching transistor and a cathode of the second loading diode, arranged as nanosized, the first and second areas are separated from each other with an area having dielectric properties, on the first area of the second type of conductivity there is the first area of the first type of conductivity, which is the base of the first switching transistor, arranged as nanosized, on the second area of the second type of conductivity there is the second area of the first type of conductivity, which is the base of the second switching transistor, arranged as nanosized, the first and second areas of the second type of conductivity are separated with an area having dielectric properties, on the first area of the first type of conductivity there is the third area of the second type of conductivity, which is arranged as nanosized and is the first emitter of the first switching transistor, on the second area of the first type of conductivity there is the fourth area of the second type of conductivity arranged as nanosized, being the first emitter of the second switching transistor, the third and fourth areas of the second type of conductivity are separated with an area having dielectric properties, on the first area of the first type of conductivity there is the fifth area of the second type of conductivity, which is the second emitter of the first switching transistor, arranged as nanosized, on the second area of the first type of conductivity there is the sixth area of the second type of conductivity, which is the second emitter of the second switching transistor, arranged as nanosized, to which a reference voltage bus is connected.

EFFECT: reduced consumed power and higher efficiency of the device.

3 cl, 8 dwg