FIELD: microelectronics; integrated circuit manufacture. SUBSTANCE: proposed method involves formation of insulating layer on silicon plate surface, evaporation of amorphous silicon layer, and formation of resistors in the latter. Prior to forming resistors in amorphous silicon layer the latter is annealed at temperature higher than that for producing next resistors and integrated-circuit structure regions. Proposed technology provides for better reproducibility of polysilicon layer properties to produce resistors or desired ratings due to selection of adequate temperature for additional annealing. EFFECT: increased yield percentage. 4 cl
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