METHOD FOR MANUFACTURE OF BIPOLAR TRANSISTOR AS A COMPOSITION OF BIPOLAR COMPLEMENTARY STRUCTURE "METAL-OXIDE-SEMICONDUCTOR" Russian patent published in 2003 - IPC

Abstract RU 2208265 C2

FIELD: microelectronics, devices of the bipolar complementary structure "metal-oxide-semiconductor", in which bipolar and field-effect transistors are formed on the same crystal expanding the functional potentialities and efficiency of digital and analog circuits. SUBSTANCE: stackers of two types of conduction are formed in a silicon plate for arrangement of field-effect and bipolar transistors, a field oxide is produced on the surface of the stackers, high-alloyed regions are formed with the same type conduction as of the collector under the field oxide, enveloping the region of the base from any of the tree sides, except for the side, where the contact to the region of the base is positioned, at least one of these three sides is contiguous to the region of the contact to the collector of the bipolar transistor, an undergate dielectric is produced, the gates of the field-effect and the electrode of the emitter of the bipolar transistors are formed from different, at least from three layers of polycrystalline silicon, a high-alloyed region in the base of the same type of conduction with the base is produced around the region of the emitter and in the point of contact to the region of the base. The gates of the field-effect and the electrode of the emitter of the bipolar transistors are formed from the same the two layers of polycrystalline silicon, first the first layer of polycrystalline silicon is precipitated directly on the undergate dielectric, the windows for the emitter are opened in the first layer of polycristalling silicon and in the undergate dielectric, then the second layer of polycrystalline silicon is precipitated, it is alloyed by admixture of the same type of conduction as emitter, after that the gates of the field-effect and the electrode of the bipolar transistor are simultaneously formed by etching of two layers of polycrystalline silicon, and the third layer of polycrystalline silicon, whenever necessary, is used for forming the passive elements of the integral microcircuit. EFFECT: reduced number of layers of polycrystalline silicon, which makes the industrial production of the structures of bipolar transistors in an integral circuit more paying, and prevents production of a low-voltage p-n junction with a high specific capacitance in the structure of the integral circuit. 8 cl, 3 dwg

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RU 2 208 265 C2

Authors

Gornev E.S.

Lukasevich M.I.

Morozov V.F.

Ignatov P.V.

Evdokimov V.L.

Dates

2003-07-10Published

2001-07-09Filed