PROCESS OF MANUFACTURE OF BIPOLAR COS/MOS STRUCTURE Russian patent published in 1999 - IPC

FIELD: microelectronics. SUBSTANCE: invention is related to technology of manufacture of bipolar COS/MOS integrated circuits when n and p channel field-effect and n-p-n bipolar transistors are formed on one crystal. Proposed process of manufacture of bipolar COS/MOS structures provides for winning of high parameters of n-p-n bipolar and field-effect transistors and sufficiently shortens route of manufacture of structures. Formation of emitter electrode from second polysilicon layer in process of manufacture of bipolar COS/MOS structure is conducted with overlapping of window for emitter in first polysilicon layer and in dielectric under gate by value of lithography error. Regions of drain and source of n channel field-effect transistor are doped with impurity of second type of conductance with lesser length of path during implantation, first firing is carried out at high temperature and regions of drains and source of p channel field-effect transistor, of passive base and emitter of bipolar transistor are doped with impurity of first type of conductance with greater length of path during implantation, second firing is conducted at temperature below that of first firing. EFFECT: enhanced quality of structure, keeping of high efficiency and gain of transistor passed through shortened route that provides for saving of masking operations with definite sequence of conducting of firing of implanted impurities, creation of possibility of formation of parameters of deep collector and region of local collector under emitter of bipolar transistor. 2 cl, 7 dwg