FIELD: manufacture of semiconductor devices, digital instruments, integrated circuits resistant to destabilizing factors. SUBSTANCE: process includes cyclic annealing of working- wafer inner getter in inert medium and gettering to remove impurities and defects from its surface layer through depth equal to at least thickness of instrument layer; connection of working wafer to oxidized carrier wafer by thermal compression and abrasive-chemical compaction of wafer to desired thickness of instrument layer; prior to joining working wafer with getter by compression it is brought to amorphous state on side to be in contact with carrier wafer by irradiating with medium-energy ions and after implanted layer is removed wafers are joined together by thermal compression. EFFECT: enhanced quality of silicon-on-insulator instrument layers due to reducing their defects. 1 tbl, 1 ex
