SCALED INTEGRATED DATA PROCESSING DEVICE Russian patent published in 2003 - IPC

Abstract RU 2201015 C2

FIELD: computer engineering; microcomputers. SUBSTANCE: device has carrying substrate, processor module, and memory module formed, respectively, in at least one processor layer (P), memory layer (M) or integrated processor/memory layers (MP) that form main layers of device. Each main layer (P, M, MP) has electricity conducting structures forming three-dimensional internal connections in layer, and the latter is formed from plurality of sublayers, each incorporating delimited parts of predetermined geometry firming, respectively, insulating, semiconductor, or conducting parts for organizing integrated active and passive circuit components inserted in processors and memory units. Circuit components, processors, and memory units are interconnected by means of electricity conducting structures. In this way device has scaled architecture enabling raising processor and memory capacities to practically unlimited values. Device may take different forms of scaled parallel architectures integrated with optimal three-dimensional interrelation.. EFFECT: enhanced capacity of processor and memory. 16 cl, 26 dwg

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RU 2 201 015 C2

Authors

Gudesen Khans Gude

Nordal' Per-Ehrik

Lejstad Gejrr I.

Dates

2003-03-20Published

1999-06-02Filed