FIELD: microelectronics; manufacture of integrated circuits and semiconductor devices. SUBSTANCE: method includes formation of MOS transistor drain regions of first polarity of conductivity for masking insulator on wafer surface, depressions for separating single-crystalline areas on wafer, thin sub- gate insulator on open surface regions of silicon, filling of depressions with polycrystalline silicon that functions as gate, ion doping and thermal treatment to produce sub-gate of second polarity of conductivity, its contact region of second polarity of conductivity, and source region of first polarity of conductivity in each of above-mentioned single-crystalline part, and formation of metal contacts. Upon formation of sub-gate insulator thin polysilicon layer is evaporated onto wafer, depressions are filled with photoresist flush with wafer surface, polysilicon sections unmasked by photoresist are removed, photoresist is removed from depressions, and the latter are filled with polysilicon of desired polarity of conductivity using methods of local evaporation from gas phase flush with wafer surface. EFFECT: facilitated procedure due to reduced number of operations including precision ones; enhanced yield. 1 cl, 10 dwg
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Authors
Dates
2003-07-27—Published
2002-05-30—Filed