METHOD OF CMOS TRANSISTORS MANUFACTURING WITH RAISED ELECTRODES Russian patent published in 2008 - IPC H01L21/8238 

FIELD: electrical engineering.

SUBSTANCE: in method of CMOS transistors manufacturing with raised electrodes after opening of windows for drain-source regions and formation of separating dielectric on walls of windows, amorphous silicon is formed on windows walls, single-crystal electrodes in drain-source windows are formed by method of hydride epitaxy, as a result of which in windows that are opened to single-crystal silicon, mono-silicon is growing, and above amorphous silicon - polycrystalline silicon, polycrystalline silicon is removed by chemical-mechanical polishing and selective etching of dielectric that is installed above locking and isolating regions is carried out. Single-crystal electrodes of drain-source regions reduce series resistance of transistor, which increases its fast-action.

EFFECT: increase of proper items production by prevention of high leakage currents of p-n transitions or short circuit of gate - (drain-source regions), base - (drain-source regions).

3 cl, 8 dwg