METHOD FOR INSTALLATION AND OF LARGE SEMICONDUCTOR CHIPS IN PACKAGES Russian patent published in 2003 - IPC

FIELD: semiconductor engineering. SUBSTANCE: proposed method used for manufacturing large semiconductor devices and large-scale integrated circuits when assembling chips in packages by soldering with lead-free solder includes evaporation of aluminum layer, 0.7-1.2 mcm thick, on collector side of chip and soldering to solder-covered package. Aluminum layer on collector side of chip is covered with zinc layer and soldered joint is made on tin-covered package base; thickness of zinc and tin layers are chosen so as to ensure desired thickness of soldered joined and formation of zinc-tin alloy. Soldered joints produced in the process are free from incomplete fusion points and oxide inclusions, surface area of joints obtained equal that of chip, and solder is free from lead. EFFECT: facilitated soldering of semiconductor chips in packages. 1 cl