FIELD: semiconductor engineering.
SUBSTANCE: proposed method intended for producing integrated circuits in micro, microphoto-, opto-, and nanoelectronics, as well as for manufacturing multilayer semiconductor structures such as silicon-on-silicon and silicon-on-insulator ones involves following procedures. First and second semiconductor or glass, or crystal substrates, similar or different ones, each incorporating at least one mirror-finished surface and one oriented cut, are placed in lots into separate magazines, gaps being provided between substrates to ensure easy access of chemical solutions and water to them; mirror-finished surfaces of first substrates and those of second substrates are facing opposite sides and are cleaned with chemical solutions, including those imparting water-absorbing property to them, then they are washed with deionized water. After that all magazines holding first and second substrates are joined together and first substrates are transferred to magazine holding second substrates in deionized water bath taking measures to prevent their contact with surrounding atmosphere so that mirror-finished surface of first substrate faces that of second substrate with a gap between them and oriented cuts of substrates are aligned. Then pairs of first and second substrates are alternately supplied to compression unit, substrates are placed one on top of other and compressed by applying external pressure throughout entire surface of substrate for tight void-free splicing. Pairs of first and second substrates produced in this way are placed in storage container or magazine for heat treatment. In this way tight void-free splicing of substrates can be made with aid of commercial equipment for quantity production in lots (batch treatment) in production premises of lower purity class. Direct splicing of substrates under quantity production conditions does not reduce quality of their splicing(free from air bubbles).
EFFECT: reduced cost and yield due to reduced quantity of defective substrates.
13 cl, 3 dwg, 1 tbl
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Authors
Dates
2005-01-10—Published
2002-12-19—Filed