FIELD: technologies for testing and controlling integral chips.
SUBSTANCE: in the method of sorting of batch of integral memory devices on basis of radiation resistance to effect of ionizing radiation, mainly on basis of level of no-breakdown operation of control sample of high speed chips, until measuring level of no-breakdown operation of sample chips are cooled down to minimally allowed temperature, at which for each one value of time of preserving of appropriate test information in memory elements of memory device with pulse disabling of power is determined. Correlation interconnection of data for sample chips is set between values of no-breakdown operation level and values of time of preservation of test information at normal and minimally allowed temperatures and then control sample is selected with required limit value of no-breakdown operation level and volumetric limit value of time of preservation of test information at minimally allowed temperature is determined for it. For sorting, each chip of batch is cooled down to limit temperature, at which then time of preservation of test information is measured, and during separation of batch first group is formed by chips, which are more resilient than control sample, and second group is formed of other chips, on basis of result of comparison of their value of time of preservation of test information with limit value of time of preservation of test information of control sample for current temperature.
EFFECT: higher reliability.
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Authors
Dates
2005-03-27—Published
2003-12-02—Filed