METHOD FOR GRADING BATCH OF INTEGRAL MEMORY CIRCUITS WITH RESPECT TO THEIR RADIATION STABILITY Russian patent published in 2000 - IPC

FIELD: production of electronic equipment, in particular, for testing digital semiconductor chips. SUBSTANCE: method involves making representative sample of integral circuits from batch, measuring electric characteristics for each circuit in sample using testing device by means of application of ramp-up voltage from output of power supply (voltage increases up to nominal value), reading content of matrix of memory chips into additional memory unit of controller by means of exhaustive search of addresses of all locations in matrix of memory chips. Then method involves bit-by-bit inverting of resulted content in order to produce test information array, which is stored into chip to be tested into respective address locations. Then method involves measuring storage of test information array for pulse voltage drop. Then method involves radiation tests of all chips in sample using prior art methods and detection of level of fault-tolerant operations of each chip. Said level of fault-tolerant operations provides data to establish number of grades. EFFECT: decreased cost, increased speed and fidelity of grading. 5 dwg