METHOD FOR PRODUCING CONGRUENT BIPOLAR CMOS DEVICE Russian patent published in 2007 - IPC H01L21/8248 

FIELD: microelectronics; manufacture of congruent bipolar complementary metal-oxide semiconductor structures for integrated circuits.

SUBSTANCE: proposed method for producing congruent bipolar CMOS device includes opening of all windows for bipolar and MOS transistor regions as well as insulating regions in third and second insulating layers and in first polycrystalline silicon layer up to first insulating layer at a time. First insulating layer is locally removed in windows for insulating regions and isolating dielectric is formed on vertical walls by third insulating layer. Linear dimension of windows for insulating regions equals one and a half of linear photochemical graphic dimension of windows for active base and gate regions, and collector contact which ensures complete filling of transistor structure windows with second dielectric when forming isolating dielectric from second dielectric on vertical walls of windows for insulating regions, half as thick as linear photochemical graphic dimension of active base windows, and makes it possible to form insulating layer without separating them from other regions of transistor structures. Isolating dielectric made of third dielectric layer protects first and second dielectric layers and first polycrystalline silicon layer in windows for insulating regions and collector contacts; in windows for active base and gate regions this isolating dielectric protects second dielectric layer and first polycrystalline silicon layer and enables etching of first dielectric layer under first polycrystalline silicon layer in these windows only thereby making it possible to combine passive, active base, emitter, gate, drain, and source regions. Compact transistor structures are attained due to congruency of their regions with insulating ones.

EFFECT: enhanced reproducibility of device parameters due to congruent technology used for their manufacture.

4 cl, 6 dwg