METHOD FOR SELF-ALIGNED FORMATION OF INSULATION OF INTEGRAL MICROCHIP ELEMENTS AND POLYSILICON CONTACTS TO SUBSTRATE AND HIDDEN LAYER Russian patent published in 2009 - IPC H01L21/762 

FIELD: physics, semiconductors.

SUBSTANCE: application: microelectronics, technology of integral microchips (IMC) manufacture. In method of self-aligned formation of insulation of IMC elements and polysilicon contacts to substrate and n⁺ - hidden layer on semiconducting substrate with solid hidden and epitaxial layers, the first and second dielectric layers are formed, in which photolithography is used to open window in place of future collector contact to n⁺ - hidden layer, separating third dielectric is formed on window vertical walls, screening layer is formed in window, simultaneously windows are opened in the first and second dielectrics for deep insulating area and contact to substrate, slot is etched for depth of epitaxial, hidden layers and partially substrate, and in place of collector contact separating dielectric is formed for depth of screening and epitaxial layers on vertical walls of slot, back channel areas are formed on the bottom of deep insulating slots, the second and third dielectric are formed in slots, dielectrics are locally etched from slot bottom for contacts, and slots are filled with polysilicon, polysilicon and dielectrics planarisation is carried out, dielectric is formed on substrate, windows are opened in dielectric for contacts to substrate and to hidden layer, contacts are formed.

EFFECT: increased density of layout and reduction of technological cycle time.

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