FIELD: electronic engineering; assembling of semiconductor devices and integrated circuits.
SUBSTANCE: proposed method for connecting chips of digital silicon semiconductor devices and integrated circuits to package to form silicon-gold eutectic includes insertion of gold foil between chip and package base and their soldering together. Prior to soldering foil is annealed in vacuum at temperature of 160-250 °C or in hydrogen at temperature of 25 °C and at atmospheric pressure of 101 kPa.
EFFECT: enhanced quality of chip-to-package joint, facilitated procedure, enhanced quality of gold foil cleaning, improved environmental situation.
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