FIELD: physics, semiconductors.
SUBSTANCE: tunnel magnetoresistive element relates to microelectronics and specifically to spintronic hardware components - a new area in development of modern electronics, since its operation employs a spin-dependant electron transport mechanism and can be used in making conceptually new elements designed for storing, processing and transmitting information. In the tunnel magnetoresistive element which has a substrate with two ferromagnetic conducting layers separated by a thin dielectric layer, current contacts are attached to the top ferromagnetic layer of the structure whose conductivity is less than conductivity of the bottom layer and the magnetoresistive effect is realised by switching the current channel between layers with different conductivity controlled by effect of the magnetic field on magnetic tunnel junctions under the current contacts.
EFFECT: invention enables realisation of a large amount of magnetoresistive (MR) effect in a tunnel structure using current in plane (CEP) geometry when current is parallel the plane of interfaces of the layered structure and possibility of efficiently controlling the value of MR effect using bias current flowing through the current.
5 dwg, 1 ex
Title | Year | Author | Number |
---|---|---|---|
METHOD OF FORMING MAGNETORESISTIVE MEMORY ELEMENT BASED ON TUNNEL JUNCTION AND STRUCTURE THEREOF | 2012 |
|
RU2522714C2 |
MAGNETIC NEURON | 2001 |
|
RU2199780C1 |
SPIN CURRENT TO CHARGE CURRENT CONVERTER BASED ON A HETEROSTRUCTURE OF TRANSITION METAL PEROVSKITES | 2021 |
|
RU2774958C1 |
SPIN VALVE WITH CLOSED COAXIAL OR PARALLEL LAYERS (VARIANTS) AND METHOD FOR MANUFACTURE THEREOF | 2021 |
|
RU2776236C1 |
MAGNETORESISTIVE SENSOR | 2006 |
|
RU2316078C1 |
METHOD OF OBTAINING CALCIUM-DOPED LANTHANUM MANGANITE | 2012 |
|
RU2505485C1 |
METHOD OF FORMING STRUCTURES OF MAGNETIC TUNNEL BARRIERS FOR MAGNETORESISTIVE RANDOM ACCESS MAGNETIC MEMORY AND STRUCTURE OF MAGNETIC TUNNEL BARRIER FOR MAGNETORESISTIVE RANDOM ACCESS MAGNETIC MEMORY (VERSIONS) | 2007 |
|
RU2367057C2 |
MULTI-LAYERED MAGNETO-RESISTIVE NANOSTRUCTURE | 2006 |
|
RU2318255C1 |
TUNNEL DEVICE | 2007 |
|
RU2367059C1 |
CMOS/SOI MRAM MEMORY INTEGRATED WITH VLSI AND METHOD FOR PRODUCTION THEREOF (VERSIONS) | 2012 |
|
RU2532589C2 |
Authors
Dates
2010-06-20—Published
2009-04-29—Filed