FIELD: computer engineering.
SUBSTANCE: invention can be used in static CMOS RAM blocks. Apparatus comprises an output bus of the storage unit, a memory consisting of two groups of transistors each connected through transmission gates four-bit data lines, two sense amplifiers, the first and second inputs of the first sense amplifier connected to the first and second bit lines of data, the first and second inputs of the second sense amplifier coupled to third and fourth bit lines of the data memory unit is provided with first and second additional transistors and gate NOR, and a bias line to the voltage across it is greater than threshold values, wherein the sense amplifiers are reflectors current pairs transistors with the structure of the metal-oxide semiconductor and the channel hole conductivity, the inputs of OR-NO elements are connected to the outputs of the first and second sense amplifiers, which are connected, respectively, drains of the first and second additional transistors, the gates of which are connected with the line offset voltage on it larger than the threshold, and the output of OR-NO element is connected to the output bus of the memory block.
EFFECT: technical result is to increase the reliability of data read from the memory cells under the influence of a single nuclear particles in a state where the memory cell is based on two groups of transistors are temporarily stored in an unsteady state.
1 cl, 1 dwg, 5 tbl
