MEMORY CELL FOR FAST ERASABLE PROGRAMMABLE READ-ONLY MEMORY AND METHOD OF ITS PROGRAMMING Russian patent published in 2013 - IPC G11C16/02 G11C11/40 

Abstract RU 2481653 C2

FIELD: information technologies.

SUBSTANCE: memory cell comprises an n(p)-MOS-transistor, a capacitor, an address discharge bus, differing by the fact that it additionally comprises the first and second diodes and a numerical bus, at the same time the cathode (anode) of the first diode is connected with the numerical bus by a source of the n(p)-MOS-transistor, its anode is connected to the anode of the second diode, with the gate area of the n(p)-MOS-transistor and the first output of the capacitor, the second output of which is connected to the gate of the n(p)-MOS-transistor and to the address bus, and the cathode of the second diode is connected with the area of the drain of the n(p)-MOS-transistor and the discharge bus.

EFFECT: increased efficiency, reliability and integration of nonvolatile electrically programmable read-only memories.

4 cl, 5 dwg

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RU 2 481 653 C2

Authors

Murashev Viktor Nikolaevich

Shelepin Nikolaj Alekseevich

Dates

2013-05-10Published

2009-03-30Filed