FIELD: radio engineering, communication.
SUBSTANCE: method is realised by using a novel electric circuit which employs additional capacitors based on functionally integrated MOS structures formed by drain regions of MOS transistors and additional gate regions. Such a circuit provides three levels of the logic signal and implement ternary logic while keeping the same topological dimensions as in binary logic.
EFFECT: high information capacity of the logic inverter.
2 cl, 4 dwg
| Title | Year | Author | Number |
|---|---|---|---|
| TERNARY CMOS WITH NOR LOGIC ELEMENT | 2011 |
|
RU2468510C1 |
| CAPACITIVE MOS DIODE CELL OF PHOTODETECTOR-RADIATION DETECTOR | 2014 |
|
RU2583955C1 |
| MEMORY CELL FOR FAST ERASABLE PROGRAMMABLE READ-ONLY MEMORY AND METHOD OF ITS PROGRAMMING | 2009 |
|
RU2481653C2 |
| MOS-DIODE CELL OF SOLID RADIATION DETECTOR | 2011 |
|
RU2494497C2 |
| MEMORY CELL FOR HIGH-SPEED EEPROM WITH CONTROLLED POTENTIAL OF UNDER-GATE REGION | 2011 |
|
RU2465659C1 |
| DYNAMIC MEMORY LOCATION | 2001 |
|
RU2216795C2 |
| FUNCTIONALLY INTEGRATED PHOTOSENSITIVE MATRIX CELL | 2012 |
|
RU2517917C2 |
| MEMORY CELL OF A STATIC PRIMARY MEMORY APPARATUS WITH A RADIOACTIVE POWER SOURCE | 2021 |
|
RU2777553C1 |
| DYNAMIC SERIAL FUNCTIONAL DEVICE | 2005 |
|
RU2392672C2 |
| INTEGRATED CIRCUIT OF POWER BIPOLAR-FIELD-EFFECT TRANSISTOR | 2015 |
|
RU2585880C1 |
