METHOD AND SCHEME FOR THRESHOLD VOLTAGE LOSS REDUCTION AND STABILISATION OF MOS TRANSISTORS AT IC Russian patent published in 2014 - IPC G05F1/10 

FIELD: electricity.

SUBSTANCE: device includes a source of reverse bias for MOS transistors substrate in regard to their sources that generates stabilised reverse-bias voltage, which increases with decrease of threshold voltage of the MOS transistor sensor with the source short-circuited to the substrate. The device includes a charge pump device that generates pulsating voltage with absolute value bigger than absolute value of the substrate reverse-bias voltage, a threshold voltage sensor for the MOS transistors, an operating amplifier, and a resistance divider.

EFFECT: decrease of loss current and stabilisation of threshold voltage for submicron MOS transistors with low threshold voltage values at MOS IC.

6 cl, 6 dwg, 1 tbl