MEMORY CELL FOR COMPLEMENTARY METAL-OXIDE-SEMICONDUCTOR RAM STRUCTURE Russian patent published in 2016 - IPC G11C11/00 

Abstract RU 2580071 C1

FIELD: computer engineering.

SUBSTANCE: invention relates to computer engineering and can be used in units os multi-port static CMOS RAM. Memory cell for complementary microcircuit of metal-oxide-semiconductor structure RAM includes trigger, consisting of two groups of transistors, ports data recording and reading ports arranged on-chip integrated circuit, outputs of data recording ports are connected to corresponding outputs of two groups of transistors of trigger, according to the invention cell is equipped with two inverters and two inverters to third state, first outputs of first and second groups of transistors are connected to trigger input of first inverter, second outputs of first and second groups of transistors are connected to trigger input of second inverter, third output of first group of transistors of trigger and third output of second groups of transistors of trigger are connected to first inputs of first and second inverters to third state, output of first inverter is connected to second input of first and third input of second inverters to third state, output of second inverter is connected to third input of first and second input of second inverters to third state outputs of which are connected to inputs of data read ports.

EFFECT: technical result consists in improvement of reliability of reading data from memory cell at impact of single nuclear particles in conditions when trigger memory cell based on two groups of transistors is in unbalanced state.

2 cl, 3 dwg, 3 tbl

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Authors

Stenin Vladimir Jakovlevich

Katunin Jurij Vjacheslavovich

Dates

2016-04-10Published

2015-04-07Filed